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Title:Architectural and Compiler Techniques for Energy Reduction in High-Performance Microprocessors
Author(s):Bellas, Nikolaos
Subject(s):Low power design
Memory hierarchy
Compiler optimizations
Cache memories
Issue Date:1998
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign.
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-98-2226, DAC-70
Genre:Report (Grant or Annual)
Type:Text
Language:English
URI:http://hdl.handle.net/2142/103935
Sponsor:INTEL
Date Available in IDEALS:2019-05-23


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