Files in this item

FilesDescriptionFormat

application/pdf

application/pdf99-2228.pdf (6MB)Restricted to U of Illinois
Full textPDF

Description

Title:Test Pattern Generation and Test Application Time Reduction Algorithms for VLSI Circuits
Author(s):Hamzaoglu, Ilker
Subject(s):Automatic test generation
Test application time reduction
Test set compaction
Design for testability
Built-in self test
Combinational circuits
Sequential circuits
Issue Date:1999-10
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-99-2228, CRHC-99-15
Type:Text
Language:English
URI:http://hdl.handle.net/2142/103949
Sponsor:Semiconductor Research Corp. / SRC 97-DS-482 PATEL
DARPA / DABT63-95-C-0069
Date Available in IDEALS:2019-05-23


This item appears in the following Collection(s)

Item Statistics