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Title:Hardware-based network monitoring with programmable switch
Author(s):Gu, Xinyi
Contributor(s):Huang, Jian
Network Monitoring
Network Function Acceleration
Abstract:In this thesis, we present an implementation of hardware-based network monitoring. The NetFPGA is used as the hardware in this case because of its features of high performance and open-source. The NetFPGA works as a programmable switch. IP addresses are assigned and a Transmission Control Protocol (TCP) connection is built for testing. We developed the design based on the NetFPGA-SUME reference source code [3]. Simulations generated by Vivado 2016.4 [4] in the environment of Ubuntu 14.04 [5] will be used to verify the functionality. The results are from the real-world hardware test and measurement. The outputs of the functions implemented on NetFPGA will be connected to the already-existing registers, which are defined in the NetFPGA-SUME source code. The server side can read the registers to know the result of the network monitoring. Then we will test the accuracy by using software-based network monitoring tools. We show the snippet of code in Verilog to monitor the packets transferring and its performance will be shown in the later sections. Some deeper discussions on network acceleration and the optimization of design are also mentioned in this thesis.
Issue Date:2019-05
Date Available in IDEALS:2019-06-13

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