Digital-to-analog converter for on-chip oscilloscope

Abstract

A register-transistor level simulation of on-chip oscilloscope (OCO) with equivalent-time sampling method is implemented with Verilog-AMS. The main purpose is to measure the jitter noise for clock signal. The advantage of this design is that the sampling frequency can be the same as the periodic input waveform, which increases the range of measurable frequency. A transistor-level design of monotonic digital-to-analog converter for the OCO with R-2R ladder structure is implemented in 180-nm CMOS technology.