Rewriting logic is a simple computational logic that can naturally express both concurrent computation and logical deduction with great generality. This paper provides a gentle, intuitive introduction to its main ...

This thesis introduces a novel representation for three-dimensional (3D) objects in terms of local affine-invariant descriptors of their appearance and the spatial relationships between the corresponding affine regions. ...

The compression efficiency of Distributed Video-Coding (DVC) suffers from the necessity of transmitting a large number of key-frames which are intra-coded. This paper describes a new 3D model-basedDVC approach which reduces ...

In this paper, we propose a data acquisition and analysis framework for materials-to-devices processes, named 4CeeD, that focuses on the immense potential of capturing, accurately curating, correlating, and coordinating ...

This thesis describes a module planner for decomposing arbitrary functional specifications of any complexity into abstract cells for custom-VLSI module generation. A graph representing random logic is partitioned and the ...

This dissertation investigates novel methods of accelerating the central computations of physically-based light transport algorithms. We present novel mappings of the crucial primitive operations of ray tracing and shading ...

We evaluate our model on the criteria of expressiveness, performance and usability. The model is sufficiently expressive for applications used in our Active Space. The performance overhead of our access control is demonstrated ...

In evaluating a query using a network database, the links need to either be followed or be saved. Most of the previous approaches follow the links in evaluating a query using a network database. Actually, it is not always ...

In this paper, we propose a new protocol, named DDA (Distributed Delay Allocation), which provides average delay guarantees to real-time multimedia applications in wireless ad hoc networks. By adapting the contention window ...

We further motivate the need for next generation load balancing strategies for petaflops class machines. We explore a novel design of a scalable hierarchical load balancing scheme, which incorporates an explicit memory ...