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Title:Performance enhancement of GaN-based high-power hemts by selective-area growth using plasma-assisted molecular beam epitaxy
Author(s):Pang, Liang
Advisor(s):Kim, Kyekyoon
Department / Program:Electrical & Computer Eng
Discipline:Electrical & Computer Engr
Degree Granting Institution:University of Illinois at Urbana-Champaign
High Electron Mobility Transistor (HEMT)
Selective area growth (SAG)
Plasma-assisted molecular beam epitaxy (PAMBE)
power switch
current density
on-state resistance
breakdown voltage
Gallium Nitride (GaN)
Abstract:This thesis work presents a comprehensive study of the application of the PAMBE-SAG technique to fabrication of high-power GaN-based switching HEMTs. First, a detailed study of the efficacy of SAG was conducted by comparing it with ion-implantation, a popular technique for improving Ohmic contacts. A consistent improvement in device performance by SAG was achieved, including lower contact resistance, higher peak drain currents and higher breakdown voltages. Since the results indicated that SAG is effective in fabricating HEMTs for high power applications, it was then employed to fabricate large-periphery AlGaN/GaN HEMTs for high current operation. A high saturation current of 1.75A and low on-state resistance of 4.76mΩ cm2 for a total gate width of 5.2mm were achieved. Finally, a study on enhancement of the breakdown voltage was conducted. For the first time, the use of sputtered-SiO2 as the gate insulator was investigated. Good oxide film quality was confirmed by a low leakage current of 2.76x10-6A/mm and a high gate breakdown voltage of 250V. A dual-SiO2-deposition method which incorporates both PECVD-SiO2 and sputtered-SiO2 was then proposed to solve the problem of reduction in current caused by sputtering. The MOSHEMT fabricated using this method showed more than twofold increase in the current when compared with a regular HEMT without oxide insulation. A high breakdown voltage of 620V at 6µm gate-to-drain distance was also achieved, demonstrating that the oxide film made by our dual-SiO2-deposition approach is a more effective gate insulator for breakdown voltage enhancement than many techniques previously reported.
Issue Date:2010-05-18
Rights Information:Copyright 2010 Pang Liang
Date Available in IDEALS:2010-05-18
Date Deposited:May 2010

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