Files in this item

FilesDescriptionFormat

application/pdf

application/pdf9411672.pdf (6MB)Restricted to U of Illinois
(no description provided)PDF

Description

Title:Scheduling and allocation problems in high-level synthesis
Author(s):Kim, Taewhan
Doctoral Committee Chair(s):Liu, C.L.
Department / Program:Computer Science
Discipline:Computer Science
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:Ph.D.
Genre:Dissertation
Subject(s):Applied Mechanics
Engineering, Electronics and Electrical
Computer Science
Abstract:Various aspects of the two major tasks in high-level synthesis, scheduling and allocation, are studied in this thesis. Specifically, we study (1) the problem of scheduling dataflow graphs with conditional branches; (2) the problem of utilizing multi-port memories in data path synthesis; (3) the problem of integrating the scheduling and allocation steps; and (4) the problem of data path synthesis for testability.
Issue Date:1993
Type:Text
Language:English
URI:http://hdl.handle.net/2142/20327
Rights Information:Copyright 1993 Kim, Taewhan
Date Available in IDEALS:2011-05-07
Identifier in Online Catalog:AAI9411672
OCLC Identifier:(UMI)AAI9411672


This item appears in the following Collection(s)

Item Statistics