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Title:Analysis and design of algorithm-based fault-tolerant systems
Author(s):Nair, V.S.Sukumaran
Department / Program:Electrical and Computer Engineering
Discipline:Electrical Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:Ph.D.
Genre:Dissertation
Subject(s):Engineering, Electronics and Electrical
Abstract:An important consideration in the design of high performance multiprocessor systems is to ensure the correctness of the results computed in the presence of transient and intermittent failures. Concurrent error detection and correction have been applied to such systems in order to achieve reliability. Algorithm Based Fault Tolerance (ABFT) has been suggested as a cost-effective concurrent error detection scheme. The research reported in this thesis has been motivated by the complexity involved in the analysis and design of ABFT systems. To that end, a matrix-based model has been developed and, based on that, algorithms for both the design and analysis of ABFT systems are formulated. These algorithms are less complex than the existing ones. In order to reduce the complexity further, a hierarchical approach is developed for the analysis of large systems.
Issue Date:1990
Type:Text
Language:English
URI:http://hdl.handle.net/2142/22206
Rights Information:Copyright 1990 Nair, V. S. Sukumaran
Date Available in IDEALS:2011-05-07
Identifier in Online Catalog:AAI9114357
OCLC Identifier:(UMI)AAI9114357


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