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Title:Simulation of IBIS models using HSpice and ADS
Author(s):Win, Si
Advisor(s):Schutt-Ainé, José E.
Department / Program:Electrical & Computer Eng
Discipline:Electrical & Computer Engr
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):input/output buffer information specification (IBIS) Simulation
Abstract:Due to timing issues created by high speed applications, simulation of in- put/output (I/O) buffers with an emphasis on signal integrity has been an important aspect in the design of integrated circuits (IC). Simulation of I/O buffers however proved to be quite difficult. For vendors it would mean releasing proprietary information about their I/O buffers which would not only include a full transistor-level schematic but also full process informa- tion such as transistor oxide thickness. In addition, for designers to perform a full transistor-level simulation it would take hours using traditional circuit simulators such as SPICE. This led to the development of input/output buffer information specifica- tion (IBIS) which was developed at Intel to overcome these obstacles. IBIS uses a behavioral modeling method that is based on I-V and V-t curves ob- tained from either direct measurements or circuit simulations. This provided designers with a model that contains nonproprietary information about I/O buffers and provided a fast alternative method to full transistor-level simu- lations. In this thesis we will show how to simulate IBIS models using traditional circuit simulators: specifically Synopsys HSpice and Agilent Advanced De- sign System (ADS). IBIS has become widely accepted in industry due to the fact that it protects the intellectual property of vendors and because of its standardized format which allows it to be integrated with many circuit simulators.
Issue Date:2012-09-18
Rights Information:Copyright 2012 Si Win
Date Available in IDEALS:2012-09-18
Date Deposited:2012-08

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