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Title:Exposing Memory Access Locality in Parallel Architectures
Author(s):Colombo, Greg
Contributor(s):Lumetta, Steve
Subject(s):computer memory
memory access
computer architecture
parallel architecture
parallel processing
massively parallel processing
Abstract:This work explores the tradeoffs of the memory system of a new massively parallel multiprocessor in view of the difficulties it presents to programmers. The architecture under consideration groups processing elements together into octets that share a local cache and locally buffer the lines read from that cache as they are accessed and broadcast. Such a system is most effective when applications’ memory accesses are arranged to maximize spatial and temporal locality. The discussion centers on programmers’ ability to arrange their programs in this way without resorting to writing significant chunks of code in assembly language. We show that in many cases it is possible to improve application performance by unrolling loops, reordering memory accesses, and using the register file as a small, fast memory. The practicality of these techniques and the possibility of automating this work are also discussed.
Issue Date:2008-05
Publication Status:unpublished
Peer Reviewed:not peer reviewed
Date Available in IDEALS:2014-01-27

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