Files in this item
|(no description provided)|
|Title:||A Structured Memory Access Architecture|
|Author(s):||Pleszkun, Andrew Richard|
|Department / Program:||Electrical Engineering|
|Degree Granting Institution:||University of Illinois at Urbana-Champaign|
|Subject(s):||Engineering, Electronics and Electrical|
|Abstract:||When conventional von Neumann architectures reference the memory, addressing information must first be obtained, usually by transfer from the memory to the CPU. The work performed by the CPU can be partitioned into a computation process and an access process. Outside of adding addressing modes to instructions, little has been done to reduce the work performed by the access process or to reduce the demands placed on the memory for access-related activities. This work investigates one method of reducing the von Neumann bottleneck and improving the degree of overlap between the computation and access processes.
Program referencing behavior is first studied by analyzing program address traces. With the information gained from the address trace analysis, a Structured Memory Access (SMA) architecture is developed which makes fewer references to memory and permits the access process to be, by and large, decoupled from the computation process, thus providing a maximum degree of overlapped execution and access prediction.
To evaluate the effectiveness of the SMA architecture in reducing addressing overhead, a comparison is made between a hypothetical SMA machine and a VAX-like machine with respect to the number of memory references generated by a set of programs. Depending on the program, the SMA machine reduced the number of memory references to between 1/5 and 2/5 of those required by a conventional VAX.
An estimate is also made of an SMA machine's performance relative to that of a VAX. A machine's performance is parameterized by the memory bandwidth and the computational overhead. It was found that performance is very sensitive to these parameters; however, an SMA machine performs significantly better than a conventional machine with the same parameters.
The SMA architecture reduces addressing overhead and provides improved system performance by (1) efficiently generating operand requests, (2) making fewer memory references, and (3) maximizing computation and address generation overlap.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1982.
|Date Available in IDEALS:||2014-12-15|
This item appears in the following Collection(s)
Dissertations and Theses - Electrical and Computer Engineering
Dissertations and Theses in Electrical and Computer Engineering
Graduate Dissertations and Theses at Illinois
Graduate Theses and Dissertations at Illinois