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|Title:||Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits|
|Department / Program:||Electrical Engineering|
|Degree Granting Institution:||University of Illinois at Urbana-Champaign|
|Subject(s):||Engineering, Electronics and Electrical|
|Abstract:||The increased complexity of the very large scale integrated circuits (VLSI) has greatly impacted the field of computer-aided design (CAD). One of the problems brought about is the interconnection problem.
In this research, the goal is twofold. First of all, a more accurate numerical method to evaluate the interconnect capacitance, including the coupling capacitance between interconnects and the fringing field capacitance, was investigated, and the integral method was employed. Two FORTRAN programs "CAP2D" and "CAP3D" based on this method were developed. Second, a PASCAL extraction program emphasizing the extraction of interconnect parameters was developed. It employs the "cylindrical approximation formula" for the self-capacitance of a single interconnect and other simple formulas for the coupling capacitances derived by a "least square method". The extractor assumes only Manhattan geometry and NMOS technology. Four-dimensional binary search trees are used as the basic data structure.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1983.
|Date Available in IDEALS:||2014-12-15|
This item appears in the following Collection(s)
Dissertations and Theses - Electrical and Computer Engineering
Dissertations and Theses in Electrical and Computer Engineering
Graduate Dissertations and Theses at Illinois
Graduate Theses and Dissertations at Illinois