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|Title:||Instruction Sets for Parallel Random Access Machines|
|Author(s):||Trahan, Jerry Lee|
|Doctoral Committee Chair(s):||Loui, Michael C.|
|Department / Program:||Electrical Engineering|
|Degree Granting Institution:||University of Illinois at Urbana-Champaign|
|Subject(s):||Engineering, Electronics and Electrical
|Abstract:||In this thesis, we compare the computational power of time bounded Parallel Random Access Machines (PRAMs) with different instruction sets. A basic PRAM can perform the following operations in unit-time: addition, subtraction, Boolean operations, comparisons, and indirect addressing. Multiple processors may concurrently read and concurrently write a single cell. Let PRAM$\lbrack op\rbrack$ denote the class of PRAMs with the basic instruction set augmented with the set $op$ of instructions. Let $\uparrow$ and $\downarrow$ denote unrestricted left and right shift, respectively.
We prove that polynomial time on a PRAM(*) or on a PRAM(*,$\div\rbrack$ or on a PRAM$\lbrack\uparrow,\downarrow\rbrack$ is equivalent to polynomial space on a Turing machine (PSPACE). This extends the result that polynomial time on a basic PRAM is equivalent to PSPACE (Fortune and Wyllie, 1978) to hold when the PRAM is allowed unit-time multiplication or division or unrestricted shifts. It also extends to the PRAM the results that polynomial time on a random access machine (RAM) with multiplication is equivalent to PSPACE (Hartmanis and Simon, 1974) and that polynomial time on a RAM with shifts (that is, a vector machine) is equivalent to PSPACE (Pratt and Stockmeyer, 1976; Simon, 1977).
This thesis establishes that the class of languages accepted in polynomial time on a PRAM (*,$\uparrow,\downarrow$) contains the class of languages accepted in exponential time on a nondeterministic Turing machine (NEXPTIME) and is contained in the class of languages accepted in exponential space on a Turing machine. This result is notable because if, as has been conjectured, NEXPTIME properly contains PSPACE, then a PRAM (*,$\uparrow,\downarrow$) is more powerful, to within a polynomial factor in time, than a PRAM with one of the other instruction sets.
We present efficient simulations of PRAMs with enhanced instruction sets by sequential RAMs with the same instruction sets. This thesis presents simulations of probabilistic PRAMs by deterministic PRAMs, using parallelism to replace randomness. We also give simulations of PRAM (op) s by PRAMs, where both the simulated machine and the simulating machine are exlusive read, exclusive write machines.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1988.
|Date Available in IDEALS:||2014-12-15|
This item appears in the following Collection(s)
Dissertations and Theses - Electrical and Computer Engineering
Dissertations and Theses in Electrical and Computer Engineering
Graduate Dissertations and Theses at Illinois
Graduate Theses and Dissertations at Illinois