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Title:A Minimum Area VLSI Architecture for O(logn) Time Sorting
Author(s):Bilardi, G.; Preparata, F.P.
Issue Date:1983-11
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. R-1006 (UILU-ENG 83-2227)
Genre:Report
Type:Text
Language:English
Description:Coordinated Science Laboratory was formerly known as Control Systems Laboratory
URI:http://hdl.handle.net/2142/74207
Sponsor:Contract N00014-79-C-0424
Date Available in IDEALS:2015-04-06


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