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Title:The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors
Author(s):Chang, Pohua P.; Lavery, Daniel M.; Hwu, Wen-mei W.
Subject(s):Code scheduling
Control-intensive programs
Optimizing compiler
Register allocation
Superpipelined processors
Superscalar processors
Issue Date:1991-05
Publisher:Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-91-2228, CRHC-91-18
Genre:Report
Type:Text
Language:English
Description:Coordinated Science Laboratory was formerly known as Control Systems Laboratory
URI:http://hdl.handle.net/2142/74514
Sponsor:National Science Foundation / MIP-8809478
NCR
AMD 29K Advanced Processor Development Division
National Aeronautics and Space Administration / NASA NAG 1-613
U.S. Department of Energy / DOE DE-FGO2-85ER25001
IBM Corporation
Date Available in IDEALS:2015-04-06
2017-07-14


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