Files in this item

FilesDescriptionFormat

application/pdf

application/pdfB53-CRHC_92_09.pdf (8MB)
(no description provided)PDF

Description

Title:Automatic Generation of Instruction Sequences for Testing Microprocessors
Author(s):Lee, Jaushin; Patel, Janak H.
Subject(s):VLSI
CAD
High level test generation
High-level test generation
Microprocessors
Issue Date:1992-06
Publisher:Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-92-2213, CRHC-92-09
Genre:Report
Type:Text
Language:English
Description:Coordinated Science Laboratory was formerly known as Control Systems Laboratory
URI:http://hdl.handle.net/2142/74531
Sponsor:Semiconductor Research Corporation / SRC 91-DP-109
Date Available in IDEALS:2015-04-06


This item appears in the following Collection(s)

Item Statistics