Files in this item

FilesDescriptionFormat

application/pdf

application/pdfB44-CSG_11.pdf (26MB)Restricted to U of Illinois
(no description provided)PDF

Description

Title:The Design of a VLSI Systolic Array Processor Cell with Concurrent Error Detection
Author(s):Chin, Michael Tsung Sheng
Issue Date:1982-10
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. CSG-11
Genre:Report
Type:Text
Language:English
Description:Coordinated Science Laboratory was formerly known as Control Systems Laboratory
URI:http://hdl.handle.net/2142/75283
Sponsor:N00039-80-C-0556
Date Available in IDEALS:2015-04-22


This item appears in the following Collection(s)

Item Statistics