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Title:Exploiting Layout Hierarchy in a VLSI Design Rule Checker
Author(s):McDonald, Michael Ray
Subject(s):VLSI design
Design rules
Rectangle intersection
Hierarchical layout
Design rule checker
Issue Date:1983-12
Publisher:Computer Systems Group, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. CSG-22
Genre:Report
Type:Text
Language:English
Description:Coordinated Science Laboratory was formerly known as Control Systems Laboratory
URI:http://hdl.handle.net/2142/75296
Sponsor:Naval Electronics Systems Command / N00039-80-C-0556
Date Available in IDEALS:2015-04-22
2017-07-15


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