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Title:A Parallel Algorithm for Multi-Level Logic Synthesis Using the Transduction Method
Author(s):Lim, Chieng-Fai
Subject(s):Multi-level networks
Optimization
Parallel pruning
Partitioning
Load balancing
Shared memory
Shared-memory
Issue Date:1991-09
Publisher:Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-91-2245, CRHC-91-27
Genre:Report
Type:Text
Language:English
Description:Coordinated Science Laboratory was formerly known as Control Systems Laboratory
URI:http://hdl.handle.net/2142/75392
Sponsor:National Aeronautics and Space Administration / NASA NAG 1-613
Semiconductor Research Corporation / SRC 90-DP-109
Date Available in IDEALS:2015-04-22
2017-07-15


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