Files in this item
| Files | Description | Format |
|---|---|---|
|
application/pdf  B54-CRHC_91_3.pdf (27MB) | (no description provided) |
Description
| Title: | Logic Synthesis for Testability |
| Author(s): | De, Kaushik |
| Subject(s): | Logic synthesis
Testability Logic partitioning Test length reduction Synthesis for testability |
| Issue Date: | 1991-02 |
| Publisher: | Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign |
| Series/Report: | Coordinated Science Laboratory Report no. UILU-ENG-91-2207, CRHC-91-3 |
| Genre: | Report (Grant or Annual) |
| Type: | Text |
| Language: | English |
| Description: | Coordinated Science Laboratory was formerly known as Control Systems Laboratory |
| URI: | http://hdl.handle.net/2142/75393 |
| Sponsor: | Semiconductor Research Program / 90 DP 109 |
| Date Available in IDEALS: | 2015-04-22 2017-07-15 |