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Title:Hierarchical Approaches to VLSI Circuit Layout
Author(s):Sarrafzadeh, Majid
Subject(s):Top-down approach
Bottom-up approach
Channel Routing Problem
45° grid
LLSI circuit layout
Issue Date:1986-12
Publisher:Applied Computation Theory, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-86-2240, ACT-72
Genre:Report
Type:Text
Language:English
Description:Coordinated Science Laboratory changed its name from Control Systems Laboratory
URI:http://hdl.handle.net/2142/75712
Sponsor:Semiconductor Research Corporation / SRC-RSCH-84-06-049-6
Date Available in IDEALS:2015-04-22


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