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Title:Reliable and Low -Power Signal Processing via Algorithmic Noise -Tolerance
Author(s):Hegde, Rajamohana M.
Doctoral Committee Chair(s):Shanbhag, Naresh R.
Department / Program:Electrical and Computer Engineering
Discipline:Electrical and Computer Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Engineering, Electronics and Electrical
Abstract:In this dissertation, we address the problem of designing reliable and low-power VLSI systems for communications and DSP applications. An information theoretic framework to derive the lower bound on energy dissipation of VLSI circuits in presence of deep submicron noise is presented. It is shown that error-control coding can be employed to approach these bounds. We introduce algorithmic noise-tolerance (ANT) which is employing error-control at the algorithmic level to achieve reliable operation in presence of noise. We introduce voltage overscaling where the supply voltage is reduced beyond the limit imposed by the critical path delay to reduce energy dissipation. The resulting degradation in algorithmic performance is restored by employing ANT, thereby achieving energy savings while meeting the algorithmic performance specifications.
Issue Date:2002
Description:90 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2002.
Other Identifier(s):(MiAaPQ)AAI3044109
Date Available in IDEALS:2015-09-25
Date Deposited:2002

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