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Title:Characterization, Design, and Modeling of on -Chip Electrostatic Discharge Protection Devices
Author(s):Li, Junjun
Doctoral Committee Chair(s):Rosenbaum, Elyse
Department / Program:Electrical Engineering
Discipline:Electrical Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Engineering, Electronics and Electrical
Abstract:In this dissertation, extensive results are presented on characterization, design, and modeling of on-chip ESD protection devices. Specifically, simulator-independent circuit-level compact models for ESD protection NMOSFETs and diodes are developed using the Verilog-A language. Model confirmations are obtained through experimental data of a 0.6-mum, and a 0.13-mum CMOS technology. Small-signal and large-signal models are provided to ensure accurate ac and transient simulation. Improved avalanche multiplication factor equations are used to avoid convergence problems. Key modeling parameters are analyzed and important elements identified for accurate capture of the trigger voltage. Various trigger mechanisms are then studied to further understand the NMOS transient snapback behavior. Compact models of the on-resistance are proposed to incorporate the self-heating effect. Investigations on the turn-on behaviors of ESD protection MOSFETs and diodes reveal clear voltage overshooting with the help of an improved VFTLP (Very Fast Transmission Line Pulsing) system. Next, the ESD robustness of a 0.13-mum CMOS technology is carefully evaluated with design considerations given. Last, design techniques of RC-triggered, MOSFET based power clamps are discussed. A compact, timed-shutoff power clamp is proposed for area reduction and performance improvement.
Issue Date:2004
Description:142 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2004.
Other Identifier(s):(MiAaPQ)AAI3130970
Date Available in IDEALS:2015-09-25
Date Deposited:2004

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