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Title:SOI Circuit Design Styles and High-Level Circuit Modeling Techniques
Author(s):Kanj, Rouwaida
Doctoral Committee Chair(s):Rosenbaum, Elyse
Department / Program:Electrical Engineering
Discipline:Electrical Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Engineering, Electronics and Electrical
Abstract:Cell-based noise analysis tools. In advanced SOI technologies, the input noise may propagate, with little attenuation, through several or many gates. Therefore, accurately modeling noise propagation (from a cell's inputs to its outputs) is of significant importance for cell-based noise analysis tools. We propose and implement two new macromodeling techniques for purposes of building a noise-rule library. Our models capture the cell's output response due to noise at its input. Thus, one may accurately predict the propagated noise, perform failure/sensitivity (stability) analysis, or even hierarchically build the noise abstracts by invoking those high-level macromodels.
Issue Date:2004
Description:99 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2004.
Other Identifier(s):(MiAaPQ)AAI3153228
Date Available in IDEALS:2015-09-25
Date Deposited:2004

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