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Title:Dynamic Optimization in Hardware
Author(s):Fahs, Brian Matthew
Doctoral Committee Chair(s):Patel, Sanjay J.; Lumetta, Steven S.
Department / Program:Electrical Engineering
Discipline:Electrical Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Computer Science
Abstract:On a broad level, we describe the relationship between well-known compiler optimization concepts and hardware-implemented optimizations. We define and explore two hardware-centric dynamic optimization paradigms: continuous optimization and discrete optimization. Continuous optimization optimizes instructions in the processor pipeline prior to execution. It is primarily useful for reducing processor resource contention and increasing ILP. Discrete optimization captures reusable chunks of the dynamic instruction stream, optimizes them, and then sequences them back into execution. Its primary benefits come from reducing instruction count and increasing ILP. The benefits of these two models are mostly orthogonal, and, therefore, they can be combined to provide larger improvements than either approach could provide by itself.
Issue Date:2005
Description:229 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2005.
Other Identifier(s):(MiAaPQ)AAI3202089
Date Available in IDEALS:2015-09-25
Date Deposited:2005

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