Files in this item
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|---|---|---|
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application/pdf  3223723.pdf (3MB) | (no description provided) |
Description
| Title: | Communication-Inspired Design of on -Chip Buses |
| Author(s): | Sridhara, Srinivasa Raghavan |
| Doctoral Committee Chair(s): | Shanbhag, Naresh R. |
| Department / Program: | Electrical Engineering |
| Discipline: | Electrical Engineering |
| Degree Granting Institution: | University of Illinois at Urbana-Champaign |
| Degree: | Ph.D. |
| Genre: | Dissertation |
| Subject(s): | Engineering, Electronics and Electrical |
| Abstract: | We mitigate the effects of intersymbol interference by employing a variable threshold inverter as an equalizer and operate the bus at rates beyond the rate governed by RC delay of the interconnect. We demonstrate even higher speeds by combining equalization with crosstalk avoidance coding. Simulation results for a 10-mm 32-bit bus in 0.13-mum CMOS technology show that 1.28x speed-up is achievable by equalization alone and 2.30x speed-up is achievable by joint equalization and coding. |
| Issue Date: | 2006 |
| Type: | Text |
| Language: | English |
| Description: | 102 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2006. |
| URI: | http://hdl.handle.net/2142/80964 |
| Other Identifier(s): | (MiAaPQ)AAI3223723 |
| Date Available in IDEALS: | 2015-09-25 |
| Date Deposited: | 2006 |
This item appears in the following Collection(s)
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Dissertations and Theses - Electrical and Computer Engineering
Dissertations and Theses in Electrical and Computer Engineering -
Graduate Dissertations and Theses at Illinois
Graduate Theses and Dissertations at Illinois