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Title:Analysis and Design of Soft-Error Tolerant Circuits
Author(s):Zhang, Ming
Doctoral Committee Chair(s):Shanbhag, Naresh R.
Department / Program:Electrical and Computer Engineering
Discipline:Electrical and Computer Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:Ph.D.
Genre:Dissertation
Subject(s):Engineering, Electronics and Electrical
Abstract:We propose a cost-effective testing scheme for verification of proof-of-concept soft-error tolerant designs. It is based on the observation that crosstalk noise can be intentionally introduced into a dense layout to emulate SETS. It has been implemented on a test chip featuring the TPTT technique.
Issue Date:2006
Type:Text
Language:English
Description:112 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2006.
URI:http://hdl.handle.net/2142/80968
Other Identifier(s):(MiAaPQ)AAI3223763
Date Available in IDEALS:2015-09-25
Date Deposited:2006


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