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Title:Design and Development of Cell Queuing, Processing, and Scheduling Modules for the iPOINT Input-Buffered ATM Testbed
Author(s):Duan, Haoran
Doctoral Committee Chair(s):Sung-Mo Kang
Department / Program:Electrical Engineering
Discipline:Electrical Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Physics, Optics
Abstract:During this research, a five-port IQ-based optoelectronic iPOINT ATM switch has been developed and demonstrated. It has been fully functional with an aggregate throughput of 800 Mb/s. The second-generation IQ-based switch is currently under development. Equipped with iiQueue modules and MUCS module, the new switch system will deliver a multi-gigabit aggregate throughput, eliminate HOL blocking, provide per-VC QoS, and achieve near-100% link bandwidth utilization. Complete documentation of input modules and trunk module for the existing testbed, and complete documentation of 3DQ, iiQueue, and MUCS for the second-generation testbed are given in this dissertation.
Issue Date:1997
Description:319 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1997.
Other Identifier(s):(MiAaPQ)AAI9737094
Date Available in IDEALS:2015-09-25
Date Deposited:1997

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