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Title:Modeling, Simulation and Design of EOS/ESD Protection Devices and Circuits in Silicon-on-Insulator Technology
Author(s):Raha, Prasun Kumar
Doctoral Committee Chair(s):Rosenbaum, Elyse
Department / Program:Electrical Engineering
Discipline:Electrical Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Engineering, Electronics and Electrical
Abstract:For the first time, a circuit level simulation tool for CMOS-on-SOI ESD protection networks is presented. The simulator, SOI-iETSIM, has built-in device models for completely coupled electrothermal simulation of SOI protection devices operating in the high current regime. The implementation of thermal models in a circuit level simulator for SOI circuits is discussed. Modeling the floating body effects in SOI MOSFETs and their effect on the device operation in the snapback mode is also discussed. The implementation of the parasitic BJT in the SOI MOSFET model is different from previously published models. Device simulation examples and an SOI-ESD protection circuit simulation example are also presented.
Issue Date:1998
Description:107 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998.
Other Identifier(s):(MiAaPQ)AAI9834733
Date Available in IDEALS:2015-09-25
Date Deposited:1998

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