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Description
Title: | High-Level Power Estimation |
Author(s): | Nemani, Mahadevamurty |
Doctoral Committee Chair(s): | Farid N. Najm |
Department / Program: | Electrical Engineering |
Discipline: | Electrical Engineering |
Degree Granting Institution: | University of Illinois at Urbana-Champaign |
Degree: | Ph.D. |
Genre: | Dissertation |
Subject(s): | Engineering, Electronics and Electrical |
Abstract: | High-level power estimation requires high-level predictions of circuit average activity, area, and delay, in order to estimate power. The main contribution of this research is development of predictors (estimators) for activity, area, and delay for combinational circuits, thus making it possible to estimate power at the RT level. All of the above predictors work with a functional description of the design and avoid the time consuming translation of the RT description into a circuit-level description, thus making them fast, which in turn enables the designer to explore the area, delay, and power space early in the design. |
Issue Date: | 1998 |
Type: | Text |
Language: | English |
Description: | 146 p. Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998. |
URI: | http://hdl.handle.net/2142/81250 |
Other Identifier(s): | (MiAaPQ)AAI9904547 |
Date Available in IDEALS: | 2015-09-25 |
Date Deposited: | 1998 |
This item appears in the following Collection(s)
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Dissertations and Theses - Electrical and Computer Engineering
Dissertations and Theses in Electrical and Computer Engineering -
Graduate Dissertations and Theses at Illinois
Graduate Theses and Dissertations at Illinois