Files in this item

FilesDescriptionFormat

application/pdf

application/pdf9990006.pdf (5MB)Restricted to U of Illinois
(no description provided)PDF

Description

Title:Low-Power Reconfigurable Digital Signal Processing
Author(s):Goel, Manish
Doctoral Committee Chair(s):Naresh Shanbhag
Department / Program:Electrical Engineering
Discipline:Electrical Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:Ph.D.
Genre:Dissertation
Subject(s):Engineering, Electronics and Electrical
Abstract:We present a design methodology for low-power communication systems. This is based on the concept of DAT and intellectual property (IP) core generators. Energy-optimum parameters are obtained via DAT, and are fed into IP core generators, which generate a synthesizable VHDL description of the IP core. The IP cores are synthesized via commercial logic synthesis tools. The proposed design methodology has been applied to generate receiver gate-level netlist for several channels including the microwave and cable channels.
Issue Date:2000
Type:Text
Language:English
Description:116 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2000.
URI:http://hdl.handle.net/2142/81349
Other Identifier(s):(MiAaPQ)AAI9990006
Date Available in IDEALS:2015-09-25
Date Deposited:2000


This item appears in the following Collection(s)

Item Statistics