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Title:Techniques to Address Unreliability and Variability of Computing Systems
Author(s):Nakano, Jun
Doctoral Committee Chair(s):Torrellas, Josep
Department / Program:Computer Science
Discipline:Computer Science
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:Ph.D.
Genre:Dissertation
Subject(s):Computer Science
Abstract:We show that FGBB should be applied in an architecture-aware manner, following the shapes of architectural modules. The reason is that architectural functionality affects the BB needed through temperature and type of critical path. To prove this idea, we develop a model of threshold voltage variation and apply it to simulated batches of chips. We show that architecture-aware FGBB enables 35% of the chips to work at the highest frequency, compared to 18% with conventional FGBB, potentially increasing each chip's value by 50%. It also reduces the leakage of the chips by 40%, compared to 25% with conventional FGBB.
Issue Date:2006
Type:Text
Language:English
Description:76 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2006.
URI:http://hdl.handle.net/2142/81724
Other Identifier(s):(MiAaPQ)AAI3223677
Date Available in IDEALS:2015-09-25
Date Deposited:2006


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