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Title:Techniques to Mitigate the Effects of Congenital Faults in Processors
Author(s):Sarangi, Smruti R.
Doctoral Committee Chair(s):Torrellas, Josep
Department / Program:Computer Science
Discipline:Computer Science
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Computer Science
Abstract:Using this model we introduce a novel framework that shows how microarchitecture techniques can mitigate variation-induced errors and even trade them off for power and processor frequency. Several such techniques are analyzed---in particular, a high-dimensional dynamic-adaptation technique that maximizes performance when there is slack in variation-induced error rate and power. The results show that our best combination of techniques increases processor frequency by 61% on average, allowing the processor to cycle 26% faster than without variation. Processor performance increases by 44% on average, resulting in a performance that is 18% higher than without variation---at only a 12.5% area cost.
Issue Date:2007
Description:142 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2007.
Other Identifier(s):(MiAaPQ)AAI3270016
Date Available in IDEALS:2015-09-25
Date Deposited:2007

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