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Title:Worst-Case Timing Analysis of Concurrently Executing DMA I/O and Programs
Author(s):Huang, Tai-Yi
Doctoral Committee Chair(s):Liu, Jane W.S.
Department / Program:Computer Science
Discipline:Computer Science
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Computer Science
Abstract:A cycle-stealing DMA I/O task is allowed to proceed only when the CPU does not need the system bus. As a result, the execution time of a cycle-stealing DMA I/O task is affected by a set of CPU tasks which execute concurrently with the I/O task. We discuss the problem of bounding the WCET of a cycle-stealing DMA I/O task under a workload which consists of a set of independent CPU tasks. Each CPU task has an arbitrary release time. We use the dynamic programming technique to bound the WCET of the I/O task.
Issue Date:1997
Description:90 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1997.
Other Identifier(s):(MiAaPQ)AAI9812633
Date Available in IDEALS:2015-09-25
Date Deposited:1997

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