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Title:Logic Synthesis for Engineering Changes
Author(s):Hsieh, Chang-Chao
Doctoral Committee Chair(s):Muroga, Saburo
Department / Program:Computer Science
Discipline:Computer Science
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:Ph.D.
Genre:Dissertation
Subject(s):Engineering, Electronics and Electrical
Abstract:In the optimization phase, the Transduction method and the delay-reducing/delay-restricted Transduction method are employed to minimize the area or delay of the already rectified network. Compatible sets of permissible functions are utilized to increase the effectiveness of optimization. The final network produced by SYLON-EC is both rectified and optimized.
Issue Date:1998
Type:Text
Language:English
Description:217 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998.
URI:http://hdl.handle.net/2142/81926
Other Identifier(s):(MiAaPQ)AAI9912270
Date Available in IDEALS:2015-09-25
Date Deposited:1998


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