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Title:Additive Fabrication and Soft -Lithographic Patterning of Microelectronic Devices
Author(s):Erhardt, Martin Karl
Doctoral Committee Chair(s):Nuzzo, Ralph G.
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:Ph.D.
Genre:Dissertation
Subject(s):Engineering, Materials Science
Abstract:Chapter 1 outlines the background and motivation for applying selective film deposition and soft-lithographic patterning techniques to microelectronic device fabrication. Chapter 2 describes how microcontact printing of organic self-assembled monolayers (SAMs) can be used to induce selective chemical vapor deposition (CVD) of platinum and palladium metal films on silicon, which are used extensively in the microelectronics industry to make metal silicide interconnects. The fabrication of platinum silicide Schottky diodes described in chapter 3 demonstrates the efficacy of soft-lithographically molded polymer templates for the selective deposition of platinum by CVD and the use of this same polymer template as a resist to buffered HF/NH4F oxide etchant. The silicon metal-oxide-semiconductor field effect transistor (MOSFET) fabrication detailed in chapter 4 demonstrates the successful use of soft-lithographic surface patterning in the fabrication of silicon devices requiring multilevel pattern registration. The fabrication of hydrogenated amorphous silicon thin-film transistors (TFrs) described in chapter 5 demonstrates the use of soft-lithography to pattern micron-scale device features on a spherically curved substrate---a significant advantage over conventional photolithography. Each of the three device arrays described in chapters 3, 4, and 5 was fabricated by a rapid prototyping process that uses mask patterns printed on transparency sheets rather than electron-beam written chrome-on-quartz masks. Finally, the investigation recorded in chapter 6 demonstrated how perfluoropolyethers (PFPEs) can be used as contact printing inks to make patterns of discrete beads with micron-scale lateral dimensions and nanoscale vertical dimensions. Such patterns may be useful as nanoscale spacers to prevent contact between patterned substrates in multi-substrate vertical assemblies.
Issue Date:2001
Type:Text
Language:English
Description:132 p.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 2001.
URI:http://hdl.handle.net/2142/87882
Other Identifier(s):(MiAaPQ)AAI3017070
Date Available in IDEALS:2015-09-28
Date Deposited:2001


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