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Title:Design and Synthesis for Testability Using Architectural Descriptions
Author(s):Chickermane, Vivekanand
Subject(s):Design-for-test
Architectural descriptions
At-speed
VLSI
Scan/non-scan
Hierarchical structures
Issue Date:1993-05
Publisher:Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-93-2219, CRHC-93-10
Genre:Report
Type:Text
Language:English
URI:http://hdl.handle.net/2142/88462
Sponsor:Semiconductor Research Corporation
IBM Corporation / IBM Computer Science Fellowship
Date Available in IDEALS:2015-12-10


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