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Description
Title: | Design, Analysis and Reconfiguration of Defect-Tolerant VLSI and Parallel Processor Arrays |
Alternative Title: | Design, Analysis, and Reconfiguration of Defect-Tolerant VLSI and Parallel Processing Arrays |
Author(s): | Shi, Weiping |
Subject(s): | Reconfiguration
Analysis Design Defect-tolerant VLSI parallel processing arrays |
Issue Date: | 1994-09 |
Publisher: | Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign |
Series/Report: | Coordinated Science Laboratory Report no. UILU-ENG-94-2236, CRHC-94-21 |
Genre: | Report (Grant or Annual) |
Type: | Text |
Language: | English |
URI: | http://hdl.handle.net/2142/88482 |
Sponsor: | Semiconductor Research Corporation |
Date Available in IDEALS: | 2015-12-10 2017-07-15 |