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Title:Test Pattern Generation and Test Application Time Reduction Algorithms for VLSI Circuits
Author(s):Hamzaoglu, Ilker
Subject(s):Automatic test generation
Test application time reduction
Test set compaction
Design for testability
Built-in self test
Combinatorial circuits
Sequential circuits
Issue Date:1999-10
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-99-2228 (CRHC-99-15)
Genre:Report
Type:Text
Language:English
URI:http://hdl.handle.net/2142/88517
Sponsor:DARPA / DABT63-95-C-0069
Semiconductor Research Corp. / SRC 97-DS-482 PATEL
Date Available in IDEALS:2015-12-10


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