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Title:A Theory for Algorithm-based Fault Tolerance in Array Processor Systems
Author(s):Banerjee, Prithviraj
Subject(s):Fault tolerance
Fault detection
Fault location
Array processors
Errors
Checks
Assertions
Bounds
Probabilistic model
Coding
Issue Date:1984-12
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. CSG-39
Genre:Report
Type:Text
Language:English
URI:http://hdl.handle.net/2142/88588
Sponsor:Naval Electronics Sys. Comm. / N00039-80-C-0556
Date Available in IDEALS:2015-12-10


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