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Title:Efficient Direct-Method Parallel Circuit Simulation Using Multilevel Node Tearing
Author(s):Chang, Mi-Chang
Subject(s):Circuit simulation
Parallel processing
Multilevel partitioning
Direct parallel solution
Sparse matrices
Scheduling
VLSI circuits
Issue Date:1989-01
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-89-2201, DAC-13
Genre:Report
Type:Text
Language:English
URI:http://hdl.handle.net/2142/88614
Sponsor:Texas Instruments, Inc.
Date Available in IDEALS:2015-12-10


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