Files in this item

FilesDescriptionFormat

application/pdf

application/pdfB52-UILU-ENG-89-2244 -DAC-17_opt.pdf (3MB)Restricted to U of Illinois
(no description provided)PDF

Description

Title:Fast Timing Simulation of MOS VLSI Circuits
Author(s):Overhauser, David Vincent
Subject(s):Timing simulation
MOS VLSI circuits
Delay equations partitioning
Mixed-mode simulation
Waveform relaxation
Issue Date:1989-12
Publisher:Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-89-2244, DAC-17
Genre:Report
Type:Text
Language:English
URI:http://hdl.handle.net/2142/88617
Sponsor:AT&T Bell Labs Fellowship
Semiconductor Research Corp. / SRC 88-DP-109
Date Available in IDEALS:2015-12-10


This item appears in the following Collection(s)

Item Statistics