Files in this item
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application/pdf ![]() ![]() | Full text |
Description
Title: | Worst Case Voltage Drops in Power and Ground Buses of CMOS VLSI Circuits |
Author(s): | Kriplani, Harish |
Subject(s): | Voltage drop
CMOS circuits VLSI circuit reliability Power and ground buses Maximum current |
Issue Date: | 1993-11 |
Publisher: | Analog and Digital Circuits, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign |
Series/Report: | Coordinated Science Laboratory Report no. UILU-ENG-93-2248, DAC-43 |
Genre: | Report (Grant or Annual) |
Type: | Text |
Language: | English |
URI: | http://hdl.handle.net/2142/88626 |
Sponsor: | Texas Instruments Inc., the Semiconductor Research Corporation (SRC), and USAF / 92-DP-109 and F30602-92-C-0059 |
Date Available in IDEALS: | 2015-12-10 2017-07-14 |