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Title:Test Generation and Evaluation for Bridging Faults in CMOS VLSI Circuits
Author(s):Lee, Terry Ping-Chung
Subject(s):Test generation
ATPG
Current testing
IDDQ
Bridging faults
Shorts
Genetic algorithm
GA
Issue Date:1995-09
Publisher:Analog and Digital Circuits, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-95-2234, DAC-52
Genre:Report
Type:Text
Language:English
URI:http://hdl.handle.net/2142/88631
Sponsor:SRC / 93-DP-109
Date Available in IDEALS:2015-12-10


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