Browse Dissertations and Theses - Electrical and Computer Engineering by Contributor "Shanbhag, Naresh R."

  • Lim, Sungmin (2019-01-25)
    Recent emerging machine learning applications such as Internet-of-Things and medical devices require to be operated in a battery-powered platform. As the machine learning algorithms involve heavy data-intensive computations, ...

    application/pdf

    application/pdfPDF (3MB)
  • Lee, Seok-Jun (2004)
    Various linear turbo equalizer VLSI architectures are explored. Energy-efficient architectures that eliminate redundant operations and employing early termination achieve power savings up to 60%. To improve the throughput, ...

    application/pdf

    application/pdfPDF (11MB)Restricted to U of Illinois
  • Ahmed, Arshad (2006)
    Finally, the applicability of soft-decoding for disk-drive applications is studied. Based on performance improvements and complexity requirements, generalized minimum distance decoding with maximum a priori soft-detection ...

    application/pdf

    application/pdfPDF (3MB)Restricted to U of Illinois
  • Faust, Adam (2013-02-03)
    The state-of-the-art design methodology for high-speed I/O links is to specify component-level design requirements to achieve high-fidelity component-level performance. While designing each component in the link with high ...

    application/pdf

    application/pdfPDF (4MB)
  • Zhang, Ming (2006)
    We propose a cost-effective testing scheme for verification of proof-of-concept soft-error tolerant designs. It is based on the observation that crosstalk noise can be intentionally introduced into a dense layout to emulate ...

    application/pdf

    application/pdfPDF (3MB)Restricted to U of Illinois
  • Sakr, Charbel (2017-11-10)
    Margin hyperplane classifiers such as support vector machines are strong predictive models having gained considerable success in various classification tasks. Their conceptual simplicity makes them suitable candidates for ...

    application/pdf

    application/pdfPDF (4MB)
  • Miao, Xin (2014-05-30)
    III-V semiconductor nanowire (NW) field-effect transistors (FETs) are strong candidates for future low-power digital/RF IC. Bottom-up grown NWs via the vapor-liquid-solid (VLS) mechanism are of particular interest for ...

    application/pdf

    application/pdfPDF (3MB)
  • Lu, Minwei (2010-05-19)
    In this thesis, we propose BER-optimal analog-to-digital converters (ADC) where quantization levels and thresholds are set non-uniformly to minimize the bit-error rate (BER). This is in contrast to present-day ADCs which ...

    application/pdf

    application/pdfPDF (584kB)
  • Zhang, Gong (2013-02-03)
    In many applications at the sensory edge, such as security and environmental sensing, reliable sensor nodes must operate for extended time periods on battery supplies. To meet this constraint, energy-efficient systems ...

    application/pdf

    application/pdfPDF (462kB)
  • Moctezuma, Ariel (2013-08-22)
    Amplifiers for biomedical applications have been a subject of study for more than a century. However, it was not until this last decade that amplifiers that conform to the skin mechanics were introduced. The introduction ...

    application/pdf

    application/pdfPDF (2MB)
  • Lee, Yu-Hung (2011-01-14)
    We make a case for developing statistical error models of nanoscale circuits, employing these for designing robust systems, and engineering error-statistics to enhance the performance of various robust design techniques. ...

    application/pdf

    application/pdfPDF (8MB)
  • Olson, Nicholas A. (2011-05-25)
    Advances in integrated circuit design and packaging techniques have introduced new ESD-susceptible (Electrostatic Discharge) circuit interfaces. This document will introduce these interfaces and the methods that were used ...

    application/pdf

    application/pdfPDF (1MB)
  • Jack, Nathan (2012-05-22)
    This work focuses on methods for testing and increasing the robustness of integrated circuits (ICs) to electrostatic discharge (ESD). Specifically, this work focuses on charged device model (CDM) protection and test ...

    application/pdf

    application/pdfPDF (3MB)
  • Nandwana, Romesh Kumar (2017-04-19)
    Generation of a low-jitter, high-frequency clock from a low-frequency reference clock using classical analog phase-locked loops (PLLs) requires a large loop filter capacitor and power hungry oscillator. Digital PLLs can ...

    application/pdf

    application/pdfPDF (11MB)
  • Sridhara, Srinivasa Raghavan (2006)
    We mitigate the effects of intersymbol interference by employing a variable threshold inverter as an equalizer and operate the bus at rates beyond the rate governed by RC delay of the interconnect. We demonstrate even ...

    application/pdf

    application/pdfPDF (3MB)Restricted to U of Illinois
  • Tu, Jane (2012-09-18)
    Voltage reduction is an effective technique for minimizing energy consumption but suffers from delay penalty. Conventional methodologies require rigorous voltage regulation and workload scheduling to meet timing constraints. ...

    application/pdf

    application/pdfPDF (673kB)
  • Kang, Mingu (2017-06-13)
    There is much interest in embedding data analytics into sensor-rich platforms such as wearables, biomedical devices, autonomous vehicles, robots, and Internet-of-Things to provide these with decision-making capabilities. ...

    application/pdf

    application/pdfPDF (28MB)
  • Keel, Min-Sun (2015-08-10)
    The data-rate demand in high-speed interface circuits increases exponentially every year. High-speed I/Os are better implemented in advanced process technologies for lower-power systems, with the advantages of improved ...

    application/pdf

    application/pdfPDF (8MB)
  • Zhang, Sai (2016-08-04)
    The rapid development of machine learning plays a key role in enabling next generation computing systems with enhanced intelligence. Present day machine learning systems adopt an "intelligence in the cloud" paradigm, ...

    application/pdf

    application/pdfPDF (17MB)
  • Wang, Lei (2001)
    We develop the soft-decision channel (SDC) model for deriving the lower bounds on energy dissipation of noisy digital systems. We compare the energy-efficiency bounds for domino and noise-tolerant dynamic circuits, and ...

    application/pdf

    application/pdfPDF (6MB)Restricted to U of Illinois