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Title:System-level design, simulation and measurement for high-speed data links
Author(s):Yang, Jerry
Advisor(s):Schutt-Ainé, José E.
Department / Program:Electrical & Computer Engineering
Discipline:Electrical & Computer Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:M.S.
Genre:Thesis
Subject(s):High-Speed
Data Links
SerDes
System Design
Interconnect Modeling
Simulation
Measurement
Eye Diagram
Jitter and Noise
Signal Integrity
Embedding
De-embedding
Real-Time Scope
Abstract:The era of the internet-of-things (IOT) is expanding the utilization of mobile and cloud computing to a global scale. The enormous data transport places a huge design overhead in building low-cost, low-power, low-error-rate high-speed data links. This thesis provides a system-level overview of the design, simulation, and measurement of high-speed digital applications in the context of signal integrity. Examples are provided to demonstrate the design approach and trade-offs made to arrive at the results. Modeling and simulation methodologies for high-speed interconnect are discussed and studied, using both conformal mapping and the variational method in closed-form solutions, with examples provided to study the frequency-dependent channel effects in high-speed digital systems. Detailed processes along with examples are presented at the end to illustrate some real-world issues many engineers will face when characterizing and measuring high-speed data links.
Issue Date:2015-11-23
Type:Thesis
URI:http://hdl.handle.net/2142/89204
Rights Information:Copyright 2015 Jerry Yang
Date Available in IDEALS:2016-03-02
Date Deposited:2015-12


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