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Title:Reliability Models for Double Chipkill Detect/Correct Memory Systems
Author(s):Jian, Xun; Blanchard, Sean; Debardeleben, Nathan; Sridharan, Vilas; Kumar, Rakesh
Subject(s):ECC
Memory
Chipkill correct
Modeling
Reliability
Abstract:Chipkill correct is an advanced type of error correction used in memory subsystems. Existing analytical approaches for modeling the reliability of memory subsystems with chipkill correct are limited to those with chipkill correct solutions that can only guarantee correction of errors in a single DRAM device. However, chipkill correct solutions capable of guaranteeing the detection and even correction of errors in up to two DRAM devices have become common in existing HPC systems. Analytical reliability models are needed for such memory subsystems. This paper proposes analytical models for the reliability of double chipkill detect and/or correct. Validation against Monte Carlo simulations shows that the outputs of our analytical models are within 3.9% of Monte Carlo simulations, on average.
Issue Date:2013-03
Publisher:Coordinated Science Laboratory. University of Illinois at Urbana-Champaign.
Series/Report:Coordinated Science Laboratory Report no. UILU-ENG-13-2202
Genre:Technical Report
Type:Text
Language:English
URI:http://hdl.handle.net/2142/90435
Sponsor:Department of Energy/DE-FC02-06ER25750
Date Available in IDEALS:2016-07-07


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