Files in this item



application/pdfMAHALLEY-THESIS-2016.pdf (1MB)
(no description provided)PDF


Title:Design techniques for temperature insensitive, low phase noise oscillator
Author(s):Mahalley, Makrand Bhagwat
Advisor(s):Hanumolu, Pavan K
Department / Program:Electrical & Computer Eng
Discipline:Electrical & Computer Engr
Degree Granting Institution:University of Illinois at Urbana-Champaign
50 MHz
phase noise
low power
temperature invariant
temperature sensitive
temperature insensitive
160 dB
Resistor-Capacitor (RC)
ring oscillator
RC oscillator
sensor networks
wireless sensor networks
Abstract:A reference clock generator is one of the most important components in many electronic devices. Common clock references are based on quartz crystals which offer high quality factor, good phase noise performance and excellent stability against temperature, voltage and process variation. However, due to incompatibility with silicon integration and high power consumption, they are not suitable for biomedical devices which require long battery lifetime, low cost and especially small size but do not require near-crystal accuracy. This thesis focuses on eliminating the quartz crystals and generating reference clock on a silicon chip. Moreover, this thesis proposes a way of combining two major oscillator types available in CMOS (RC and Ring) technology, while preserving the unique qualities of both of them and coming up with the proposed RCR (resistor-capacitor-ring) oscillator, that o ffers an excellent alternative for biomedical devices and wireless sensor networks. We coin the term RCR signifying the proposed approach of combining RC oscillators with ring oscillators to achieve a performance better than the performance of individual RC and ring oscillators. In order to generate stable clock frequency against temperature and supply variations a novel CMOS reference clock oscillator is proposed which exploits the RC and ring oscillator performances, providing the best of both worlds in performance. The proposed oscillator employs a supply-regulated ring oscillator in a feedback loop that follows a frequency insensitive RC oscillator, which minimizes the frequency sensitivity to supply and temperature variations. The clock oscillator achieves negligible frequency variation against supply variation of 1.1 V to 1.3 V and 0:37% against temperature variation of -40 C 125 C. In addition, low power consumption is achieved by using mostly digital circuitry operating at very low frequencies. Even the phase noise performance of the proposed oscillator shows a very high FoM of about 160 dB at the o set frequencies of 100 kHz and 1 MHz. This stability to temperature and supply along with excellent noise performance is the unique cornerstone of RCR oscillators proposed in this thesis, which cannot be found in any full-CMOS oscillators. When the performance of the clock oscillator is compared to that of the recently reported low power CMOS reference clock oscillators, the frequency variation to supply variation is reduced to zero, temperature sensitivity is also improved by approximately a factor of 3 and normalized power consumption to frequency output is reduced by a factor of 5. The proposed CMOS clock oscillator is implemented in 65 nm TSMC CMOS technology and consumes just 220 W from 1.2 V supply at an output frequency of 50 MHz.
Issue Date:2016-04-26
Rights Information:Copyright 2016 Makrand Mahalley
Date Available in IDEALS:2016-07-07
Date Deposited:2016-05

This item appears in the following Collection(s)

Item Statistics