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Title:Synthesis constraint optimization for near-threshold voltage design
Author(s):Min, David
Advisor(s):Kim, Nam Sung
Department / Program:Electrical & Computer Eng
Discipline:Electrical & Computer Engr
Degree Granting Institution:University of Illinois at Urbana-Champaign
Degree:M.S.
Genre:Thesis
Subject(s):Near-threshold voltage
Low-energy
Embedded systems
Abstract:Near-threshold voltage (NTV) design is a viable solution to many embedded systems which require high energy efficiencies and low performances, but it makes them vulnerable to process variation. Increasing the size of devices and/or decreasing the operating frequencies of the systems can be the solutions, but these methods decrease the energy efficiencies which is cancelling out the benefit from NTV. In this work, we test multiple logic synthesis options on openMSP430 microcontroller with TSMC 65nm technology library and suggest the optimal design points to the future IC designers. We find synthesizing the microcontroller with the minimum design constraint gives us the best performance and energy consumption. We also run Monte Carlo simulation to show the estimated yield rate of the suggested design points.
Issue Date:2017-04-17
Type:Thesis
URI:http://hdl.handle.net/2142/97551
Rights Information:Copyright 2017 David Min
Date Available in IDEALS:2017-08-10
Date Deposited:2017-05


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