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Title:FPGA acceleration of short read alignment with high-level synthesis
Author(s):Chen, Daniel E
Advisor(s):Chen, Deming
Department / Program:Electrical & Computer Eng
Discipline:Electrical and Computer Engineering
Degree Granting Institution:University of Illinois at Urbana-Champaign
Subject(s):Field-programmable gate array (FPGA)
Hardware acceleration
High-level synthesis
Short read alignment
Abstract:With the introduction of next-generation sequencing (NGS) technologies, DNA sequencing is becoming an increasingly widespread process. When performed on human patients, it can allow for the prediction and prevention of diseases. An essential part of this bioinformatics pipeline is short read alignment}, which refers to aligning short fragments of DNA to the large and expansive reference genome. This can be a very time-consuming process with much room for improvement. This thesis improves on Bowtie 2, an aligner that is already very popular and high-performing. Through the use of OpenCL, it is possible to parallelize this application for both GPU and FPGA by using the same code. Several different levels of parallelism are implemented in order to achieve speedup on Bowtie 2.
Issue Date:2017-04-27
Rights Information:Copyright 2017 Daniel E. Chen
Date Available in IDEALS:2017-08-10
Date Deposited:2017-05

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